Abstract
The paper presents an advanced algorithm guaranteeing optimal speed execution of FPGA based Canny gradient direction computations on the platform of total mathematical accuracy. The proposed algorithm’s speed capabilities are experimentally tested and analyzed in terms of the two capital parameters: maximum clock frequency and minimum clock cycles required for obtaining a mathematically exact result at the highest clock rate. Proved is the algorithm’s relevance to designing a novel organization of FPGA based Canny computations targeting optimal performance.