Optimal speed algorithm for calculating high and low thresholds to be used in FPGA based Canny focused on maximum performance

Abstract

The paper presents an optimal speed algorithm for accurately calculating high and low thresholds. It is to be used in FPGA based Canny targeting maximum performance. Scrutinized is the proposed algorithm’s computational mechanism. Its functionality is set forth in detail. Proved is the algorithm’s practicality in terms of guaranteeing the calculation of the most appropriate threshold values in a dynamic fashion. On a comparative basis, explored amd analyzed are the proposed algorithm’s capabilities to ensure reliable results at optimal speed under all test conditions.